1. Field of the Invention
This invention generally relates to computer processing and, more particularly, to a system and method for efficiently pre-fetching data into cache memory in preparation for processing.
2. Description of the Related Art
SoC—System on Chip;
Cache thrashing—A phenomenon where a processor cache is continuously loaded with new information, and wastefully unloaded;
Cache—a processor low latency memory that is used to pre-fetch information from another higher latency memory so that the processor can access the information faster. A cache is particularly useful when the same information is accessed several times, as loading it into low latency memory means that all the accesses occurring after the first access take less time than if all accesses were made to the higher latency memory where the data is originally located;
Stashing—The ability to load data into a processor cache by initiating a request from an entity other than the processor itself. This is a technique by which data can be placed into the processor cache at the same time that it is written to the memory where it is to be stored.
Data processing typically involves operating a list of descriptors that each point to a corresponding location in memory where an associated segment of data is stored. It also involves accessing a data base that contains information about how that data should be processed. For example, a data communication application accesses Transmission Control Protocol (TCP) packets that are received from an Ethernet port, and the Transmission Control Block that stores the state information for that TCP connection. Similarly, a packet forwarding application accesses the packet header in order to validate the formatting of the packet and determine how and to where that packet should be forwarded. The packet forwarding application also accesses a Forwarding or Routing Table that stores information about how that packet should be modified before forwarding, and to which Ethernet port that packet should be forwarded.
Additionally, if the information that is being received from the network interface is separated and queued into different Class of Service queues, with some queue arbitration scheme determining which of the queues should be processed next, then stashing may place information into cache that will not be processed for a long time, even if that particular queue is relatively empty.
It would be advantageous if the number of accesses to memory could be minimized when processing data, while avoiding the problem of cache thrashing.